The invention relates to an improvement in a method and system for estimating pulse peak amplitudes and pulse peak instances (the times or instants at which the amplitude of pulse peak occurs) of serial analog pulse sequences in which the pulses have varying amplitude, pulse widths and base levels in the presence of noise. Specifically, this is a simple but elegant digital processing approach applied to determining pulse peak amplitudes and peak instances of data pulses recovered from stored data retrieved from magneto-optical (MO) drives.
With respect to parent case Ser. No. 09/132,962 referenced above and incorporated herein by reference, there is disclosed a typical disk with servo and data sectors. The servo sector is described to have a particular architecture, i.e., a physical arrangement or pattern, of data pits, grouped into patterns. The patterns define radial servo-timing-marks (STM) marks, formed of contiguous pits of constant size between circular inner diameter ID and outer diameter OD boundaries; the patterns form data track and servo sector address marks and Position-Error-Sensing (PES) marks.
In the system of Ser. No. 09/132,962, data may be modulated by pit position modulation. Therefore, the data pit and laser spot size must be about the same size to keep pulse amplitude about the same. Returned signal pulses have a narrow full width half height maximum FWHM pulse width at the OD and a wide pulse width at the ID. The circumferential spacing between radii in the servo sector is wider at the OD than at the ID. The pits toward the OD are spaced farther apart laterally than the pits toward the ID, even though they have the same width.
With regard to FIGS. 6a and 6b in the present application, typical signal pulses that may be recovered from a disk in drive system are depicted. In a typical servo sector, the first digital data to be recovered are the STM pulses. Pulses in such systems exhibit variation in pulse width, peak amplitude, base line displacement from reference zero level, and noise on the waveform.
With regard to FIG. 4a in the present application, some characteristics of disk drive data pulses not treated by the disclosure Ser. No. 09/132,962 are shown. A signal pulse 452 recovered from an inside data (ID) track has a wider pulse width ID PW 460 than a pulse width OD PW 462 from a signal pulse recovered from an outside (OD) track OD pulse 454. Even though the peak amplitudes Apj(ID) 464 and Apj(OD) 466 of the ID and OD pulses may be the same, OD PW 462 is narrower than ID PW 460 due to the higher relative speed of the data bit and the read head toward the perimeter of the disk. Variation is also typical in the level of background reflectance which corresponds to the base signal level Base Line1470. This is indicated by a lower base signal level Base Line2472. The base line signal level Base Line1470 appears as an offset xcex2 in the signal level, from a zero level reference line 474. The maximum pulse deflections from the Base Line 470 represent the peak amplitude of the pulses, i.e., Apj(ID) 464 for the ID pulse and Apj(OD) 466 for the OD pulse. With component aging and disk contamination build up over time, Apj(ID) 464 and Apj(OD) 466 also decrease. This is indicated by the dashed lines of FIG. 4a in the present application. Digital processing of the signals ID pulse 452 and OD pulse 454 require sampling of the signals with an analog to digital converter at clock tick, k, and with a sufficiently small sample period 480, with a analog-to-digital conversion device having a sampling range 484 sufficiently large to cover the Base Line 470 expected. Random system noise 486 on the pulse signals ID pulse 452 and OD pulse 454 adds quantizing noise to any digital signal processing performed by the system 100.
With regard to Ser. No. 09/132,962, a pulse data recovery system is used in a magneto-optic disk drive. A laser spot is directed to a disk surface from a read/write head. Light reflected from the disk surface is received by the head and processed by a signal channel. The magnitude of the reflected signal from the disk surface is a constant (a base line level from a zero level reference) where the surface is flat. Pits formed in the disk surface during a mastering process cause the reflected signal near a pit to decrease as the laser spot passes over the pit edge because of destructive interference.
The resulting magnitude variation from a constant base value to a minimum peak and back to the base value is detected as a pulse signal. Achieving maximum peak pulse amplitude depends on having pit width and spot width of similar size. The pit width can be optimized for maximum signal robustness to width variations by diffraction modeling, One typical case has a pit size of about 350 nm and a 550 nm lambda wavelength laser full width half maximum (FWHM) spot size of 660 nm. The detected pulse width from the reflection of, an illuminating laser beam returned from a pit on the disk surface is related to the size of the laser spot and the size of the pit. Since pits near the OD are traveling at a higher linear speed (constant angular velocity at a greater radius) than those at the ID, the data pulse widths at the OD are correspondingly narrower. As the disc size and rotation speed are increased to achieve greater data capacity and data transfer rates, the difference between the detected pulse widths near the ID and near the OD becomes greater. In a typical application this could lead to a ratio of pulse widths of 2:1 or greater.
In Ser. No. 09/132,962, a digital signal processing channel (PDC) for recovering peak pulse amplitude and peak pulse instance is disclosed. The PDC is an invention of a digital circuit implementation of a pulse detection method and system using quadratic interpolation, peak amplitude estimation. The mariner of how the previous PDC works in combination with a Pulse Peak Synchronizer (PPS), a Servo Timing Mark Detector (STMD), a servo sector architecture, and cooperating system electronics (DDCS) is briefly summarized here.
The PDC invention of Ser. No. 09/132,962 provides an estimate, Ep(j), for the peak amplitude Ap(j) and an estimate, Toffset, for the offset of the peak instance tpj of a detected pulse from a sampling instance, e.g., a sampling clock SYSCLK. The estimates Ep(j) and Toffset, relative to the center sample of a multi-sample frame, are derived from an equation for a curve fitting parabola when the curve fitting parabola is fit to three adjacent samples of a respective data pulse. When the amplitude of a center sample is greater than or equal to the amplitude of one of the adjacent samples and is greater than the amplitude of the other adjacent sample comparator, logic sub-circuits in the PDC give indication to the system that the peak instance has occurred next to the center sample.
Pj is sampled asynchronously with SYSCLK having a sampling period Tclk more than about ⅕ and less than about ⅓ a nominal minimum pulse period Tpsmin. Tclk is provided in the system 100 at such a rate that the each pulse is consecutively sampled above a threshold value.
In a particular embodiment of the invention disclosed in Ser. No. 09/132,962, the pulse waveforms amplitudes are sampled at about 50 MHZ. The pulse amplitudes are sampled with a high-speed A to D Converter (ADC). The sampled amplitude values and identifying sample clock ticks are processed by subsystems of the invention to determine the accurate time estimates of the instance of a data pulse peak relative to the timing of a system logic bit frame. Further processing of sampled data pulse amplitudes and identifying sample clock ticks by embodiments of this invention provide accurate estimates of the instances of the pulse peaks and estimates of the pulse peak amplitudes. These estimates are provided for use by the detection and control electronics (DDCS) of the disk drive system to enable system performance enhancements, e.g. PES processing and the like.
In Ser. No. 09/132,962, following the detection of a first pulse of an STM in a servo sector, succeeding pulses are evaluated until the detector determines a servo timing mark STM is present. Typically, the first pulse of the STM is pre-qualified (by detecting a succession of logic bit frames containing zeros). Once an STM is detected, information known by the DDCS is available to determine where logic bit data in the servo sector is to be expected relative to the system logic bit frame. The system can then process following values of pulse peak instance and amplitude, e.g. process PES data pulses to follow the data track""s eccentric movement.
Each time a pulse peak instance and amplitude estimate is provided by the pulse detection channel of the Ser. No. 09/132,962 disclosure, it is stored by the system. When other predetermined conditions are met, the system processes the stored pulse data estimates to take corrective action.
In Ser. No. 09/132,962, the method and system works well as long as the sampling rate SYSCLK is high enough relative to the pulse width, PW, and the DPS1 analog pulse waveform being sampled and the PW is wide enough. If the values of at least the three center samples of a five sample group (e.g., X1, X2, X3, X4, X5) remain close to a quadratic approximation, the quadratic interpolation gives satisfactory estimates of the peak amplitude and peak instance. However, if the signal pulse width gets too small for the given sampling rate available, the error between the actual values of the outer two of the center three samples (e.g., X2 and X4) and the values predicted from the quadratic estimation polynomial gets too large and gives inaccurate values for the estimated peak amplitude and pulse peak instance. Inaccurate peak amplitude and instance estimates can cause post-processing electronics in the signal channel to place data bits in the wrong logic bit frame.
This is illustrated with regard to FIG. 4b in the present application, which shows a plot of two simulated bit signal waveforms: an ID bit signal 402 and an OD bit signal 404. The signals 402 and 404 are shown located within a system-logic-bit-frame indicated by arrows 410. The bit signals 402 and 404 are shown with wide (ID) and narrow (OD) pulse widths 406 and 408 respectively. The bit signals 402 and 402 are shown as positive going pulses, but may be considered equivalent to negative going pulses as well. The bit frame 410 is divided by five equally spaced sampling times 412 (xe2x88x922, xe2x88x921, 0, +1, +2) disposed symmetrically about center sample 414, i.e., from 0 phase at the center 414 of bit frame 410 to two samples 412 before (+1, +2) and after (xe2x88x921, xe2x88x922) center sample 414.
Signals 402 and 404 are shown with respective peak amplitudes 416 (ID) and 418 (OD) measured from base line 126 (i.e., peak-to-valley deflection) centered on the logic bit frame 410. peak amplitudes 416 (ID) and 418 (OD) correspond to the peak amplitude Apj of Ser. No. 09/132,962. The peak amplitudes 416 and 418 in FIG. 4b occur in phase with the center sample 414. Signals 402 and 404 are shown having similar peak amplitudes 416 and 418, but differing pulse widths 406 and 408, before processing by the peak detector 120 of the present invention. The peak amplitudes 416 and 416 are shown normalized to a value of 1 measured from a normalized base level of zero.
With respect to FIG. 4c in the present application, there is shown is a plot of sample amplitudes, ID1422, ID2424, OD1426, and OD2428 of signals 402 and 404 after processing by sampling and quantizing according to the peak detector channel, PDC, of Ser. No. 09/132,962. Processed signals ID1422, ID2424, OD1426, and OD2428 are the results of digitizing and processing as single samples, the bit signals 402 and 404 of FIG. 4b at the sample times 412 according to the method of Ser. No. 09/132,962. The results are shown under two cases of different relative phase of the peak amplitudes 416 and 418 with respect to the center sample 414. In the first case, ID1422 and OD1426 show peak amplitude estimates Ap(ID)1417 and Ap(OD)1419 when the peak amplitudes 416 and 418 are coincident with the center sample 414. In the second case, peak amplitude estimates Ap(ID)2421 and Ap(OD)2423 are shown when the peak amplitudes 416 and 418 are not coincident with the center sample 414 but instead are out of phase with the center sample 414 by xc2xc of time between adjacent samples 412. Peak amplitude estimates of FIG. 4c correspond to the estimated peak amplitude Epxe2x80x2j of Ser. No. 09/132,962.
In the first case (bit signal peak in phase with center sample), the peak estimates of ID and OD bit signals Ap(ID)l 417 and Ap(OD)l 419 give acceptable results. They have the same value, about 0.98, of the normalized peak amplitude of the bit signals 402 and 404.
However, in the second case (bit signal peak out of phase with center sample by xc2xc sampling time) the peak amplitude estimates Ap(ID)2421 and Ap(OD)2423 of the ID signal 402 and the OD bit signal 404 are different from the in phase estimate, and also greatly different from each other. The out-of-phase peak estimates Ap(ID)2421 and Ap(OD)2423 have relative values of 0.87 and 0.60.
The accuracy of the out-of-phase peak estimate Ap(ID)2421 for the ID signal 402 is acceptable. The accuracy of out-of-phase peak estimate Ap(OD)2423 is not.
One solution is to use a device for sampling that has a higher sampling rate to achieve the desired accuracy with the narrower OD pulses. Unfortunately, higher speed sampling devices usually come at an exorbitant premium in cost and perhaps are not even available at the sampling rates needed. The challenge is to try to process the signals in a way to improve the peak estimation accuracy with sampling devices of a given sampling rate.
The problem of sampling the pulses then becomes limited by the sampling rate available. As the OD pulse gets narrower, the sampling period (from the Nyquist sampling theorem) must also decrease. For a 5 sample per pulse, this places a limit on the minimum pulse width for a given sampling rate. Consequently, the performance of the sampling device (e.g., an A/D converter) limits the system performance. Therefore, in a real system, the accuracy of the estimation may be 1% at the ID but only 30% at the OD. This is a sampling theorem problem, in that it may not be possible, or economically feasible to obtain a fast enough sampling rate.
This problem will always be a concern in disk drive performance. As converters get faster, disk speed will be increased correspondingly and the same limitation of OD vs ID pulse width difference will exist.
The statement of the problem then becomes fairly simple: we want to be able to reproduce both the ID and the OD pulse signal with the required accuracy at the minimum sampling rate possible. In a case which requires 5 samples for estimating pulse amplitude and instance we may be limited to how wide the ID pulses can be made at the inner diameter. This occurs because their circumferential spacing from each other is limited by inter-symbol interference, i.e, energy from the tail of a pulse contributing to and distorting the waveform of the adjacent pulse.
A particular ratio of pulse width between ID and OD will establish the required sampling rate.
Attempts have been made to try to put the pulses through a linear analog filter, also known as an Infinite Impulse Response (IIR) filter, to broaden the narrow pulses. This causes too much interference from pulse to pulse, because energy from the previous pulse spills over into the following pulse, e.g., slowly decaying tails from the previous filtered pulse output. This is particularly problematic, when the tails of preceding data pulses of high amplitude are filtered and broadened, and interfere with following servo burst pulses.
Another concern with using analog circuit solutions is that they take up too much board area and require too many expensive components as disk drive form factors shrink. A solution minimizing parts count and board area is sought. We would like to filter the pulse in a way that stretches the pulse width without adding an infinite impulse response.
In contrast to pulses from the PES marks which may have small or no amplitude depending on the alignment of the read head with the data pits the STM signals have fairly large peak amplitudes as are all data peaks when the head is aligned. A clip level or detection threshold is typically defined by the system for detecting the presence or absence of a pulse, after the amplitude of the pulse peak is determined. The system compares the amplitude of the pulse to the threshold during the system logic bit frame. A logic one is output to the receiving system electronics if the peak amplitude exceeds the threshold, otherwise a logic zero is output for that logic bit frame. The threshold is preferably placed halfway between the top (base line level for a negative going pulse) and bottom (expected peak amplitude) of the pulses. The threshold is preferably adjusted or reset depending on the variation of the peak amplitude of the pulses. The system needs accommodation to the fact that there is varying amplitude of the pulse signal peaks.
In Ser. No. 09/132,962, an analog VGA circuit was used to normalize the pulse amplitudes by means of feedback circuitry from the peak detector PDC to the VGA. Analog VGA circuits tend to take up relatively large area and can be relatively expensive. In the case of analog signal processing, analysis shows that area detection of a differentiated OD signal (e.g., differentiation of the pulse followed by sampling and then an integration step to recover pulse shape without offset) requires at least 20 samples per servo bit period. It also shows that quadratic interpolation from three single adjacent samples will acceptably digitize the amplitude of undifferentiated, narrow OD signal with 10 samples per servo period. A requirement of 10 samples per bit period places undesirable constraints on the sampling rate required with narrow pulses.
Therefore, it would be an advantage to provide a disc drive system which provides a pulse data channel that:
. . . achieves a desired pulse instance and peak amplitude estimate accuracy at a given sample frequency rate,
. . . can reduce cost, circuit board area and/or improve accuracy,
. . . is relatively insensitive to pulse width variation from ID to OD,
. . . replaces costly and area intensive analog circuitry with relatively low cost, digital integrated circuits,
. . . reduces area demands for future miniaturization of disk drive electronics,
. . . compensates for varying pulse base line levels (pulse offset) with component aging and disc reflectivity,
. . . compensates for varying pulse peak amplitudes with component aging and disc reflectivity.
A disk drive system in accordance with the present invention includes an output providing an analog signal including a sequence of analog signal data pulses recovered from stored data on a storage disk. The data pulses have pulse widths greater than about width PW, peak magnitudes about Ap(j) deviating from a respective base line and respective peak instances. The base lines, are displaced by base line offset value xcex2 from a zero reference level.
The disk drive system includes a digital peak detection channel of the present invention in which an analog input of an analog to digital sampling device receives continuous analog values of the sequence of signal data pulses. The sampling device is responsive to a sampling clock by sampling values y(k) of the analog signals at each one of successive sample. clock times - - - , (kxe2x88x922), (kxe2x88x921), k, (k+1), (k+2), the device converts each analog value y(k) to a corresponding digital value - - - , Y(kxe2x88x922) Y(kxe2x88x921), Y(k), Y(k+1), Y(k+2), - - - . The sample clock has a sampling period of about ⅕ the pulse width expected.
The sampling device outputs sampled digital values - - - , Y(kxe2x88x922) Y(kxe2x88x921), Y(k), Y(k+1), Y(kxe2x88x922), - - - , to a digital sample value averaging device. The sample value averaging device provides an output of successive digital sample average values X(kxe2x88x921), X(k), X(k+1), - - - in which each digital sample average value X(k) is formed from a sequence of 2 adjacent samples, k, kxe2x88x921, and is equal to [Y(k)+Y(kxe2x88x921)]/2.
A peak pulse instance recognition device receives the output of 3 successive sample average values X(k), X(kxe2x88x921), X(kxe2x88x922) and provides a digital peak detect output (Pkdet) with a logic signal level at a true logic value when the logic value ((X(kxe2x88x921) greater than X(k) AND (X(kxe2x88x921) greater than X(kxe2x88x922))) is true. This provides to the disk drive control system an indication that a signal pulse peak, Ap(j)(kpk) occurred within plus or minus the one sampling period of the sampling time t(kpk). From this instance, t(kpk), other circuitry may derive status changes and computations to direct the,system response, (e.g., head position, threshold level setting, and the like) as is known in the art.
The data channel in the disk drive system of the present invention uses three successive average values X(kxe2x88x922), X(kxe2x88x921), X(k) are output to corresponding registers REG1, REG2, REG3 that provide corresponding outputs X1, X2, X3 sent to a dual paired input comparator connected to said registers. The comparator provides a peak detect output true logic level when the logic value ((X2 greater than X1) AND (X2 greater than X3)) is true. The peak detect output indicates to the disk drive system that a peak amplitude of a signal pulse has occurred between the sample instance k minus one sampling period and the sample instance k plus one period.
A data pulse peak magnitude estimator computes an estimate Ep(j), of the pulse peak amplitude Ap(j) of a pulse, j, when the peak is detected by a true logic value on the peak detect output.
The peak magnitude detector first calculates a first estimate of the peak pulse value by computing and outputting the result of an estimation algorithm, X2+|X1xe2x88x92X3|/8. The value X2 is the center value of three adjacent averaged sample values X1, X2, X3 from the digital sample value averaging device. The result of the algorithm is output as the peak estimate Ep(j) through a connection to the disk drive system.
Base line offset for non-PES signal data pulses is removed by a base line offset removal filter which subtracts the offset xcex2 from the first peak estimate value. A preferred embodiment of a digital FIR base line offset removal filter is shown that has an FIR filter function Epxe2x80x2j(k)xe2x88x92xc2xd[Epxe2x80x2j(kxe2x88x922)+Epxe2x80x2j(k+2))]. xc2xd of the common offset values xcex2 in each of the estimates Epxe2x80x2j(kxe2x88x922) and Epxe2x80x2j(k+2) are subtracted from the value of Epxe2x80x2j(k) to cancel the offset xcex2 in the center estimate Epxe2x80x2j(k).
A general logic gate assembly, e.g., an FPGA or DSP receives the output of the peak magnitude estimator and peak instance detector. The functions of the logic gate assembly include compensation functions. These compensation functions compensate for amplitude variation of peak pulse amplitude between ID and OD, and variation of base line offset of the PES pulses and the STM pulses from the servo sectors. Such compensation functions are known and may be implemented by a person having skill in the art of digital design, and are not part of the present invention.
The disk drive system of the present invention includes a plurality of circumferentially spaced apart servo sectors having specific characteristics. The specific characteristics include: at least a multi-bit STM pattern in every servo sector. at least one each A, B, C and D PES pattern in every servo sector; at least one sector locator pattern in every servo sector; and at least one track locator pattern in every servo sector. One embodiment of a simple servo sector architecture is shown for the present invention. The particular type and arrangement of bits in the patterns may be selected for a particular disk system architecture by one having skill in the art of digital system design.
The present invention discloses the computing means for computing (A-B)/(C-D), for providing corrected estimated peak pulse signal values A, B, C, D, and for compensating for a varying alpha scale factor multiplying analog pulse signal values and a varying xcex2 offset factor as a generic logic assembly e.g., FPGA. configured by one having skill in the art. Such computing means may also be constructed from other computing devices such as a plurality of individual logic gates, a microprocessor running a stored programs, or a micro-coded processor as is known in the art.
The disk drive system of the present invention also includes a pulse signal threshold setting device for setting the threshold of recognizing the 1/0 threshold of the signal pulses. The pulse signal threshold setting device for the present invention is shown as a block diagram implementing the threshold adjustment function. The design of such a device is within the capability of an ordinary skilled practitioner of digital design and is not part of the present invention. The pulse signal threshold setting device has an input for receiving estimated peak STM pulse values from a sequence of sectors. The threshold setting device implements a threshold algorithm using STM estimated peak pulse values. The threshold algorithm provides a pulse signal threshold value for recognizing the presence of a logic bit in a servo logic bit position from the value of the threshold and the estimated peak value if a peak is detected at that bit position.
In the present invention, an embodiment is shown is which the threshold algorithm is xc2xd of the average value of the estimated peak STM pulse values received from a sequence of servo sectors.
A particular embodiment includes the following elements:
1) A 10 bit 50 MHz ADC. Only 7 of the 10 bits are needed to do the peak amplitude calculation. A VGA is not needed to allow for peak pulse amplitude variation. The offset and amplitude variations are accommodated digitally by the wider ADC dynamic range and the compensation functions implemented in and processed by the FPGA front-end electronics other than the read/write head preceding the A-to-D consist of only a preamplifier.
Each digitized sample value is averaged with the previous sample value before supplying it to the peak detection and peak amplitude circuitry of the present invention. This effectively stretches the pulse width of the (narrow) OD servo bit signals. Peak Amplitude and Peak Detect outputs the present invention are processed separately to give the desired Gray code and PES calculations. The Gray code is passed thorough a (xe2x88x920.5, 0, 1, 0, xe2x88x920.5) filter to remove any base level offset. FIG. 5 is a simplified block diagram of an embodiment of the APDC of the present invention. FIG. 3 shows a simple STM, PES and Gray code servo sector pattern for the purposes of illustration.
2) A finite impulse response (FIR) filter is used to stretch the pulse width of the sampled signals. It causes the width of a narrow pulse to stretch more than a wide pulse. A first and preferred method is to add successive samples: e.g., a sampler with one bit of delay followed by an adder connected to the sampler output and the delayed sample output. A FIR filter is preferred over an analog (linear) adder. In a linear system with exponential sine and cosine eigenvalues, e.g., an Infinite Impulse Response (IIR) filter, the output response of the linear system to an input impulse contains non-zero values extending to infinity: (the Laplace transform of the system has components extending to infinity). In a finite impulse response filter (FIR) after some time, the amplitude of the output goes to zero. Therefore, the effect of adjacent pulses overlapping into following pulses can be minimized.
The present invention uses two registers and a two-input adder to emulate an FIR filter to take an average of successive pairs of samples i.e., X(i)=(Y(i)+Y(ixe2x88x921)/2 and then uses the X(i)-values in the peak instant and amplitude estimation method. That averaging transforms a narrow pulse to an estimated pulse with broader pulse width without changing the estimate of peak instance, although it does change the estimated peak amplitude.
3) The apparent problem of changing the amplitude is accommodated by a pulse amplitude normalization process that uses amplitude data from reference marks on the disc. In previous systems, OD and ID pulse widths were different, but the peak amplitude was the same. With the FIR filter averaging of this invention, the amplitude of the OD averaged pulse is lower than the averaged ID pulse [since the values average with a pulse that""s already wide are closer together than those for a pulse whose adjacent values are quite different, i.e., a narrow pulse relative to the sampling period. The invention doesn""t change pulse width of the ID pulses much, but significantly expands the width of the narrower OD pulses.
The key is the extra bits of resolution available from the A-to-D converter used in converting the sampled analog pulse waveforms into digital sample values. To achieve a 1% accuracy target, only 6 or 7 bits are needed to get the desired accuracy. Having more sampling bits available is an advantage because no information is lost due to the sampling; when the peak amplitude decreases.
The actual determination of the threshold value. the PES computation and the Gray code detection and decoding may be done in a companion DSP in cooperation with peak amplitude estimates and peak instance estimates provided by the digital peak detector of the present invention. Seven gate signals (STM, A, B, C, D, S and T) tell the DSP when the PES sample AMPLITUDE or GRAY CODE AMPLITUDE values can be read. The DSP uses the STM Gray code amplitude to determine the threshold using some fraction of a low pass filtered amplitude from previous servo sectors. The DSP uses the PES amplitude estimates corresponding to the gates A, B, C, and D to calculate (A-B)/C-D). The DSP uses the Gray code amplitude estimates corresponding to S and T to decode the digital values. A logical one is recognized to have occurred by the system if the S or T peak pulse amplitude is greater than a calculated threshold value.
The present invention includes reduced circuitry cost and size for pulse amplitude normalization, pulse width normalization, pulse offset elimination.
Furthermore, the present invention includes an undifferentiated OD signal pulse can be satisfactorily digitized with only 5 samples per servo bit period if two adjacent samples of the signal pulse are averaged prior to computing the peak amplitude estimate. The averaged signal amplitude ratio will change between wide ID pulses to narrow OD pulses in the ratio of between about 3:2 to 2:1 because of this averaging.
Also, the present invention includes an improved accuracy of pulse peak amplitude estimation and peak instance estimation is achieved by trading off an increased number of digitizing bits at a given sample rate for a pulse signal sampling A-to-D converter.
Also, in the present invention offset from a zero reference level in the amplitudes of recovered pulse signals is canceled by computing the ratio of a first difference of peak pulse amplitude between a first and second set of radially spaced peak marks and a second difference of peak pulse amplitude pulse between a third and fourth set of radially spaced peak marks amplitude (A-B)/(C-D). A, B, C, D are the peak amplitude estimates from the averaged peak pulse amplitude values received from staggered PES patterns A, B, C, D defined in a servo sector. Scale factor or peak pulse amplitude variation from ID to OD pulses is canceled in the PES signal by computing (A-B)/(C-D). The same amplitude scale factor alpha multiplies A, B, C, and D amplitudes and hence is canceled when (A-B)/(C-D) are calculated. Computation of (A-B)/(C-D) is done digitally in a preferred embodiment at low cost by using otherwise unused gates in an inexpensive FPGA or DSP integrated circuit. Any offset (base line level) in the Gray code digital information (i.e. track or sector ID) of sampled pulses from data track and servo sector address patterns is canceled by digitally subtracting from a first estimate value of the detected pulse peak amplitude the average of the estimate values of one sample preceding the detected peak and a second sample following the detected pulse.
One embodiment of a simple digital base level offset removal filter is disclosed for averaging a sample two samples before with a sample two samples after the sampling of the detected peak. This is a digital FIR filter having filter coefficients (xe2x88x920.5, 0, 1, 0, xe2x88x920.5).
The detection threshold for the Gray code digital information can be controlled by using as a threshold reference half of the low pass filtered amplitude of the servo sector SYNC marks (STM). The SYNC marks are always present at the beginning of every servo sector. Again, the low pass filtering may be done digitally at a low cost using otherwise unused gates in an inexpensive FPGA or DSP integrated circuit.